108 Commits

Author	SHA1	Message	Date
MerryMage	e2815408fd	arm_dynarmic: Update memory interface	2017-02-03 17:32:51 +00:00
MerryMage	2b36d4c9d7	arm_dynarmic: CP15 support	2017-02-03 17:32:47 +00:00
MerryMage	f8cf87ce34	arm_dynarmic: Provide MemoryReadCode callback ... Change of interface in dynarmic 36082087ded632079b16d24137fdd0c450ce82ea	2016-12-22 16:07:14 +00:00
Yuri Kunde Schlesner	16df1f8078	externals: Update Dynarmic ... Required to be able to use Xbyak in Citra without header conflicts.	2016-12-14 20:06:08 -08:00
Subv	a088ebe903	Dynarmic: Update dynarmic to version ... 54d051977f7a6af9c7596ba6a4e6eb467bd1e0bc dynarmic log: 54d0519 emit_x64: Use movdqa instead of movaps in EmitPackedSubU8 52e1445 Implement USUB8:33 2016 +0000 5c1aab1 Implement CLZ 1a1646d Implement UADD8 7cad694 IR: Implement new pseudo-operation GetGEFromOp 370f654 fuzz_arm: Add tests for parallel add/subtract (modulo) 25f21b5 emit_x64: Inline nzcv computation into EmitFPCompare32 and EmitFPCompare64 52fdec5 CMakeLists: Add support for LLVM on Windows cede5e4 emit_x64: Use xorps/xorpd when argument to TransferToFP32/TransferToFP64 is an immediate zero e166965 Implement VCMP2:33 2016 +0000 f2fe376 Support 64-bit immediates ff00b8c Document register allocator and return stack buffer optimization 95f34c6 reg_alloc: Remove unnecessary breaks after returns (#54) dc9707e externals: Update xbyak to 5.32 de1f831 microinstruction: Make use_count private (#53) 3621a92 reg_alloc: Register allocator related constraints belong with the rest of the register allocator	2016-12-04 21:40:12 -05:00
MerryMage	c46b3dec63	dynarmic: Fix ABI violation ... Caused by not saving/restoring the x64 r15 register on entry/exit from JITted code. Closes #2224.	2016-11-30 19:12:46 +00:00
James Rowe	f32309400c	Update dynarmic to the latest version (#2234)	2016-11-29 23:22:19 -05:00
bunnei	1ea1affe0a	dynarmic: Add new submodule.	2016-09-15 17:49:25 -04:00